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AR# 45072

13.3 Implementation Tools - MAP might not complete successfully if power optimization option is used


Designs with transceivers will not complete MAP successfully if they use the -poweron or the -power xe options in ISE Design Suite 13.3.

The following are power optimization options in MAP phase of 13.3 ISE toolsthat do not work satisfactorilyon designs with transceivers:

  • -power on: power optimization that utilizes the placement optimization algorithm
  • -power xe: power optimization that utilizesthe placement optimization and intelligent clock gating algorithms

Thisissue only affects designs targetedtoany device in the7 series (Artix-7, Kintex-7, and Virtex-7 devices).


This issuehas been identified and is scheduled tobe fixed in the ISE Design Suite 13.4 release (January 2012).


  1. Use the-power high switch. This switch uses the intelligent clock gating algorithm. Placement-related poweroptimization featuresare not available with this switch. No issues have been observed with the -power off or the -power high option for all designs.
  2. If you mustuse the affected switches, temporarily use version 13.2 ISEor previous versions that support 7 series in order to get rough estimates using early data.


The known issue with the-power on and -power xeswitches, however, designs without transceivers are not affected. This known issue in version 13.3 has not been observed inprevious versions of design tools.

AR# 45072
Date Created 11/18/2011
Last Updated 02/21/2013
Status Active
Type General Article
  • Virtex-7
  • Virtex-7 HT
  • Kintex-7
  • Artix-7
  • ISE Design Suite - 13.3