Version Found: v1.4 Version Resolved and other Known Issues: See (Xilinx Answer 45195).
When generating the MIG 7 Series IP core, the chk_win_top and chk_win_pi debug modules are generated even if the Debug Port is disabled in the MIG GUI.
Solution
This will cause the create_ise.bat/.sh to fail when run since the chk_win_top and chk_win_pi modules are generated and added to the ISE project file. Implementation will also fail since both modules appear in the top-level of the design.
Workaround:
Open "set_ise_prop.tcl" and remove the following two lines: