To begin debugging a suspected hardware issue on the KC705, please see (Xilinx Answer 50079) - Kintex-7 FPGA KC705 Evaluation Kit - Board Debug Checklist.
The KC705 Board Debug Checklist forms part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center.

Board/Kit Related Issues
(Xilinx Answer 37579) What device do I have on my Xilinx Evaluation Kit? Is it Engineering Sample (ES) or Production Silicon?
(Xilinx Answer 45679) Kintex-7 FPGA Base Targeted Reference Design - Release Notes and Known Issues Master Answer Record
(Xilinx Answer 46614) Kintex-7 FPGA KC705 Evaluation Kit - Usage of GTX TX/RX Polarity Controls on SFP/SFP+ Interface
(Xilinx Answer 46640) Kintex-7 FPGA KC705 - Rev 1.0- AMS evaluation board not included in my kit
(Xilinx Answer 46812) 7 Series Boards and Kits - Where can I find an ISO image of the Fedora 16 live DVD?
(Xilinx Answer 50595) Kintex-7 FPGA KC705 Evaluation Kit - No output on terminal program when running the Built-In Self Test
(Xilinx Answer 50596) Xilinx Evaluation Kits, PCIe cards - CE requirements for PC test environment
(Xilinx Answer 52888) Kintex-7 FPGA KC705 Evaluation Kit - Unable to Initialize JTAG chain when XM105 Debug FMC card connected
(Xilinx Answer 53869) Kintex-7 FPGA KC705 Evaluation Kit - USB drive no longer provided in the box
(Xilinx Answer 55395) Kintex-7 FPGA KC705 Evaluation Kit v1.1 - XTP132 - Schematics power block diagram incorrect

Documentation Related Issues
(Xilinx Answer 46535) KC705 User Guide (UG810) - GPIO_DIP_SW0 Pinout Incorrect in Table 1-24
(Xilinx Answer 47641) KC705 User Guidev1.1 (UG810) - I2C Addressing Information
(Xilinx Answer 47648) KC705 User Guide v1.1 (UG810) - SW11 DIP Switch Correction
(Xilinx Answer 53059) KC705 User Guide v1.1 (UG810) - SiT9102 Oscillator frequency stability incorrect

PCI Express/IP Related Issues
(Xilinx Answer 40469) 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for All Versions
(Xilinx Answer 44353) 7 Series Integrated Block for PCI Express - How to target the Kintex-7 Integrated Block Wrapper to the KC705 boards
(Xilinx Answer 45527) LogiCORE IP Tri-Mode Ethernet MAC v5.1/v5.2 - UCF changes needed to target KC705 RevC/RevD boards
(Xilinx Answer 45653) Design Advisory MIG 7 Series v1.4 DDR2/DDR3 - Calibration Update
(Xilinx Answer 45681) Kintex-7 FPGA KC705 Base TRD - DDR3 Fails to Calibrate
(Xilinx Answer 46709) LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Polarity change needed if using SFP on Kintex-7 KC705 board
(Xilinx Answer 46710) 10G Ethernet PCS/PMA (10G BASE-R) - Polarity change needed when using SFP on Kintex-7 KC705 board
(Xilinx Answer 52657) Kintex-7 FPGA KC705 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform

Design Tools Related Issues
(Xilinx Answer 40905) 7 Series - ISE 13.x Software Known Issues related to the 7 Series FPGAs
(Xilinx Answer 43967) 13.4 EDK - KC705 Base System Builder (BSB) Known Issues
(Xilinx Answer 44113) 13.2 EDK, axi_emc - KC705 Flash does not function
(Xilinx Answer 44191) 13.3 Kintex-7, Virtex-7 - ChipScope IBERT - Using the KC705 or VC707 Board Configuration Settings file causes implementation error
(Xilinx Answer 45648) Virtex-7 / Kintex-7 - Using KC705 or VC707 "Board Configuration Setting" in GTX IBERT uses incorrect I/O Standard for system clock
(Xilinx Answer 46253) ChipScope IBERT - Virtex-6, Kintex-7, Virtex-7 - 12 MHz cable speed does not work with IBERT
(Xilinx Answer 47816) 7 Series - ISE 14.x/Vivado 2012.2 Design Suite Known Issues Related to 7 Series FPGAs
(Xilinx Answer 50416) Kintex-7 FPGA KC705 - Base TRD throughput issues if Base TRD files do not match ISE version used
(Xilinx Answer 50886) 14.2/2012.2 Speed Files - Tactical Patch for 7 Series GES -2 Devices
(Xilinx Answer 50906) Design Advisory for Production Kintex-7 325T, 410T, 420T and Virtex-7 485XT - Bitstream compatibility requirements between GES and Production devices
(Xilinx Answer 52368) 14.3/2012.3 Speed Files - Tactical Patch for 7 Series GES -2 Devices