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AR# 45934

Kintex-7 FPGA KC705 Evaluation Kit - Known Issues and Release Notes Master Answer Record

Description

This answer record lists all known issues with the Kintex-7 FPGA KC705 Evaluation Kit.

Solution

To identify the silicon on your KC705, please see (Xilinx Answer 37579).

To begin debugging a suspected hardware issue on the KC705, see (Xilinx Answer 50079) Kintex-7 FPGA KC705 Evaluation Kit - Board Debug Checklist.

To view the Design Advisories associated with the KC705, see (Xilinx Answer 47787) Design Advisory Master Answer Record for Kintex-7 FPGA KC705 Evaluation Kit.

The KC705 Board Debug Checklist and KC705 Design Advisory Master Answer Record form part of the (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center - available to address all questions related to Xilinx Boards and Kits.

Board/Kit Related Issues

Documentation Related Issues

PCI Express/IP Related Issues

Design Tools Related Issues

Board/Kit Related Issues

(Xilinx Answer 37579) What device do I have on my Xilinx Evaluation Kit? Is it Engineering Sample (ES) or Production Silicon?
(Xilinx Answer 45679) Kintex-7 FPGA Base Targeted Reference Design - Release Notes and Known Issues Master Answer Record
(Xilinx Answer 46614) Kintex-7 FPGA KC705 Evaluation Kit - Usage of GTX TX/RX Polarity Controls on SFP/SFP+ Interface
(Xilinx Answer 46640) Kintex-7 FPGA KC705 - Rev 1.0 - AMS evaluation board not included in my kit
(Xilinx Answer 46812) 7 Series Boards and Kits - Where can I find an ISO image of the Fedora 16 live DVD?
(Xilinx Answer 50595) Kintex-7 FPGA KC705 Evaluation Kit - No output on terminal program when running the Built-In Self Test
(Xilinx Answer 50596) Xilinx Evaluation Kits, PCIe cards - CE requirements for PC test environment
(Xilinx Answer 52888) Kintex-7 FPGA KC705 Evaluation Kit - Unable to Initialize JTAG chain when XM105 Debug FMC card connected
(Xilinx Answer 53869) Kintex-7 FPGA KC705 Evaluation Kit - USB drive no longer provided in the box
(Xilinx Answer 54022) How can I order TI USB Interface Adapter EVM from Texas Instruments?
(Xilinx Answer 55395) Kintex-7 FPGA KC705 Evaluation Kit v1.1 - XTP132 - Schematics power block diagram incorrect
(Xilinx Answer 55805) Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached
(Xilinx Answer 56811) Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults?
(Xilinx Answer 59749) Kintex-7 FPGA KC705 Evaluation Kit - PCB Revision Differences
(Xilinx Answer 61849) 6 series and 7 series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution
(Xilinx Answer 66509)7 Series and UltraScale Kits - Interaction with ADI AD9625-2.5EBZ FMC card
(Xilinx Answer 67507)Xilinx Boards and Kits - Power Supply Information

Documentation Related Issues

Answer RecordTitleVersion FoundVersion Resolved
(Xilinx Answer 46535)KC705 User Guide (UG810) - GPIO_DIP_SW0 Pinout Incorrect in Table 1-24v1.0v1.1
(Xilinx Answer 47641)KC705 User Guide UG810 (v1.1) - I2C Addressing Information
v1.1
v1.4
(Xilinx Answer 47648)KC705 User Guide UG810 (v1.1) - SW11 DIP Switch Correctionv1.1v1.4
(Xilinx Answer 53059)KC705 User Guide UG810 (v1.1) - SiT9102 Oscillator frequency stability incorrectv1.1v1.2
(Xilinx Answer 58663)Kintex-7 FPGA KC705 Evaluation Kit - UG810 (v1.4) Table 1-29 Incorrect Pin Assignmentsv1.4v1.5
(Xilinx Answer 58912)Boards and Kits - Board files blocked on xilinx.com
(Xilinx Answer 64243)KC705 User Guide UG810 (v1.6) - HPC FMC connector J22 - One GTX clock supported?v1.6v1.6.1
(Xilinx Answer 64569)KC705 User Guide UG810 (v1.6.1) - USB UART pin constraints in UG810 do not match Vivado 2015.1 "part0_pins.xml" board filev1.6.1
(Xilinx Answer 65079)KC705 User Guide UG810 (v1.6.1) - Table 1-9 - SYSCLK_N / _P I/O Standardv1.6.1v1.6.2


PCI Express/IP Related Issues

(Xilinx Answer 40469) 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for All Versions
(Xilinx Answer 44353) 7 Series Integrated Block for PCI Express - How to target the Kintex-7 Integrated Block Wrapper to the KC705 boards
(Xilinx Answer 45527) LogiCORE IP Tri-Mode Ethernet MAC v5.1/v5.2 - UCF changes needed to target KC705 RevC/RevD boards
(Xilinx Answer 45653) Design Advisory MIG 7 Series v1.4 DDR2/DDR3 - Calibration Update
(Xilinx Answer 45681) Kintex-7 FPGA KC705 Base TRD - DDR3 Fails to Calibrate
(Xilinx Answer 46709) LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Polarity change needed if using SFP on Kintex-7 KC705 board
(Xilinx Answer 46710) 10G Ethernet PCS/PMA (10G BASE-R) - Polarity change needed when using SFP on Kintex-7 KC705 board
(Xilinx Answer 52657) Kintex-7 FPGA KC705 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 54643) 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions
(Xilinx Answer 59167) Design Advisory for MIG 7 Series DDR3 - Data rate specification changes for DIMM interfaces and data rate advisory for component interfaces

Design Tools Related Issues

(Xilinx Answer 40905) 7 Series - ISE 13.x Software Known Issues related to the 7 Series FPGAs
(Xilinx Answer 43967) 13.4 EDK - KC705 Base System Builder (BSB) Known Issues
(Xilinx Answer 44113) 13.2 EDK, axi_emc - KC705 Flash does not function
(Xilinx Answer 44191) 13.3 Kintex-7, Virtex-7 - ChipScope IBERT - Using the KC705 or VC707 Board Configuration Settings file causes implementation error
(Xilinx Answer 45648) Virtex-7 / Kintex-7 - Using KC705 or VC707 "Board Configuration Setting" in GTX IBERT uses incorrect I/O Standard for system clock
(Xilinx Answer 46253) ChipScope IBERT - Virtex-6, Kintex-7, Virtex-7 - 12 MHz cable speed does not work with IBERT
(Xilinx Answer 47816) 7 Series - ISE 14.x/Vivado 2012.2 Design Suite Known Issues Related to 7 Series FPGAs
(Xilinx Answer 50416) Kintex-7 FPGA KC705 - Base TRD throughput issues if Base TRD files do not match ISE version used
(Xilinx Answer 50886) 14.2/2012.2 Speed Files - Tactical Patch for 7 Series GES -2 Devices
(Xilinx Answer 50906) Design Advisory for Production Kintex-7 325T, 410T, 420T and Virtex-7 485XT - Bitstream compatibility requirements between GES and Production devices
(Xilinx Answer 52368) 14.3/2012.3 Speed Files - Tactical Patch for 7 Series GES -2 Devices
(Xilinx Answer 55931) Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits?

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43750 Xilinx Boards and Kits Solution Center - Top Issues N/A N/A

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
47648 KC705 User Guide v1.1 (UG810) - SW11 DIP Switch Correction N/A N/A
47641 KC705 User Guide v1.1 (UG810) - I2C Addressing Information N/A N/A
46812 7 Series Boards and Kits - Where can I find an ISO image of the Fedora 16 live DVD? N/A N/A
46535 KC705 User Guide (UG810) - GPIO_DIP_SW0 pinout incorrect in Table 1-24 N/A N/A
45380 Development Boards - Xilinx PCIe form factor board TI power system cooling N/A N/A
45679 Kintex-7 FPGA Base Targeted Reference Design - Release Notes and Known Issues Master Answer Record N/A N/A
46614 Kintex-7 FPGA KC705 Evaluation Kit - Usage of GTX TX / RX Polarity Controls on SFP/SFP+ interface N/A N/A
46640 Kintex-7 FPGA KC705 v1.0 - AMS Evaluation Card Not Included with Kit N/A N/A
44353 7 Series Integrated Block for PCI Express - How to Target the Kintex-7 Integrated Block Wrapper to the KC705 Boards N/A N/A
45527 LogiCORE IP Tri-Mode Ethernet MAC v5.1/v5.2 - UCF changes needed to target KC705 RevC/RevD boards N/A N/A
45653 Design Advisory MIG 7 Series v1.4 DDR2/DDR3 - Calibration Update N/A N/A
45681 Kintex-7 FPGA KC705 Base TRD - DDR3 Fails to Calibrate N/A N/A
46709 LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Polarity change needed if using SFP on Kintex-7 KC705 board N/A N/A
46710 10G Ethernet PCS/PMA (10G BASE-R) - Polarity change needed when using SFP on Kintex-7 KC705 board N/A N/A
43967 13.4 EDK - KC705 Base System Builder (BSB) Known Issues N/A N/A
44113 13.2 EDK, axi_emc - KC705 Flash Does Not Function N/A N/A
44191 13.3 Kintex-7/Virtex-7 - ChipScope IBERT - Using the KC705 or VC707 Board Configuration Settings file causes implementation error N/A N/A
45648 Virtex-7, Kintex-7 - Using KC705 or VC707 "Board Configuration Setting" in GTX IBERT uses an incorrect I/O Standard for the system clock N/A N/A
46253 ChipScope IBERT - Virtex-6, Kintex-7, Virtex-7 - 12 MHz cable speed does not work with IBERT N/A N/A
50416 Kintex-7 FPGA KC705 - Base TRD Throughput Issues if Base TRD Files do not Match ISE Version used N/A N/A
50596 Xilinx Evaluation Kits - PCIe Cards - CE Requirements for PC Test Environment N/A N/A
50886 14.2/2012.2 Speed Files - Tactical Patch for 7 Series GES/IES -2 Devices N/A N/A
37579 Which device do I have on my Xilinx Evaluation Kit; is it an Engineering Sample (ES) or Production silicon? N/A N/A
52368 14.3/2012.3 Speed Files - Tactical Patch for 7 Series GES/IES -2 Devices N/A N/A
52657 Kintex-7 FPGA KC705 Evaluation Kit, Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform N/A N/A
52888 Kintex-7 FPGA KC705 Evaluation Kit - Unable to Initialize JTAG chain when XM105 Debug FMC card connected N/A N/A
40469 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for All Versions up to Vivado 2012.4 and ISE 14.7 N/A N/A
40905 7 Series - ISE 13.x Software Known Issues related to the 7 Series FPGAs N/A N/A
50906 Design Advisory for Production Kintex-7 325T, 410T, 420T and Virtex-7 485XT, 690XT, 1140XT - Bitstream compatibility requirements between GES and Production devices N/A N/A
50079 Kintex-7 FPGA KC705 Evaluation Kit - Board Debug Checklist N/A N/A
43745 Xilinx Boards and Kits Solution Center N/A N/A
55395 Kintex-7 FPGA KC705 Evaluation Kit v1.1 - XTP132 - Schematics power block diagram incorrect N/A N/A
33569 Xilinx Evaluation Kits - Where can I find the USB UART driver? N/A N/A
55805 Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached N/A N/A
54022 How can I order TI USB Interface Adapter EVM from Texas Instruments? N/A N/A
55931 Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits? N/A N/A
58663 Kintex-7 FPGA KC705 Evaluation Kit - UG810 (v1.4), Table 1-29 Incorrect Pin Assignments N/A N/A
58912 Boards and Kits - Board files blocked on xilinx.com N/A N/A
59749 Kintex-7 FPGA KC705 Evaluation Kit - PCB Revision Differences N/A N/A
59750 Kintex-7 FPGA KC705 Evaluation Kit - Changes from rev 1.0 to rev 1.1 N/A N/A
59167 Design Advisory for MIG 7 Series DDR3 - Data rate specification changes for DIMM interfaces and data rate advisory for component interfaces N/A N/A
64243 KC705 User Guide UG810 (v1.6) - HPC FMC connector J22 - One GTX clock supported? N/A N/A
64569 KC705 User Guide UG810 (v1.6.1) - USB UART pin constraints in UG810 do not match Vivado 2015.1 “part0_pins.xml” board file N/A N/A
65079 KC705 User Guide UG810 (v1.6.1) - Table 1-9 - SYSCLK_N / _P I/O Standard N/A N/A
66509 7 Series and UltraScale Kits - Interaction with ADI AD9625-2.5EBZ FMC card N/A N/A
66788 Design Advisory for MIG 7 Series DDR3 - DQS_BIAS is not properly enabled for HR banks causing potential calibration failures N/A N/A
67507 Xilinx Boards and Kits - Power Supply Information N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
46253 ChipScope IBERT - Virtex-6, Kintex-7, Virtex-7 - 12 MHz cable speed does not work with IBERT N/A N/A
44353 7 Series Integrated Block for PCI Express - How to Target the Kintex-7 Integrated Block Wrapper to the KC705 Boards N/A N/A
44390 Kintex-7 FPGA KC705 - UCF File Comparison between Rev B and Rev C N/A N/A
45071 Kintex-7 FPGA KC705 - RevC - When I Program a Custom Bitstream, the FPGA Fan Stops Spinning N/A N/A
45527 LogiCORE IP Tri-Mode Ethernet MAC v5.1/v5.2 - UCF changes needed to target KC705 RevC/RevD boards N/A N/A
43967 13.4 EDK - KC705 Base System Builder (BSB) Known Issues N/A N/A
44113 13.2 EDK, axi_emc - KC705 Flash Does Not Function N/A N/A
44191 13.3 Kintex-7/Virtex-7 - ChipScope IBERT - Using the KC705 or VC707 Board Configuration Settings file causes implementation error N/A N/A
45648 Virtex-7, Kintex-7 - Using KC705 or VC707 "Board Configuration Setting" in GTX IBERT uses an incorrect I/O Standard for the system clock N/A N/A
45653 Design Advisory MIG 7 Series v1.4 DDR2/DDR3 - Calibration Update N/A N/A
45848 Kintex-7 FPGA KC705 Base TRD - Issues with DMA performance N/A N/A
45847 Kintex-7 FPGA KC705 Base TRD - Driver does not unload successfully N/A N/A
45845 Kintex-7 FPGA KC705 Base TRD - Fedora 16 does not boot on my PC N/A N/A
47648 KC705 User Guide v1.1 (UG810) - SW11 DIP Switch Correction N/A N/A
47641 KC705 User Guide v1.1 (UG810) - I2C Addressing Information N/A N/A
46710 10G Ethernet PCS/PMA (10G BASE-R) - Polarity change needed when using SFP on Kintex-7 KC705 board N/A N/A
46709 LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Polarity change needed if using SFP on Kintex-7 KC705 board N/A N/A
46640 Kintex-7 FPGA KC705 v1.0 - AMS Evaluation Card Not Included with Kit N/A N/A
46614 Kintex-7 FPGA KC705 Evaluation Kit - Usage of GTX TX / RX Polarity Controls on SFP/SFP+ interface N/A N/A
46535 KC705 User Guide (UG810) - GPIO_DIP_SW0 pinout incorrect in Table 1-24 N/A N/A
46017 Kintex-7 FPGA KC705 Base TRD - Low memory systems may hang when running Base Targeted Reference Design N/A N/A
47787 Design Advisory Master Answer Record for Kintex-7 FPGA KC705 Evaluation Kit N/A N/A
37579 Which device do I have on my Xilinx Evaluation Kit; is it an Engineering Sample (ES) or Production silicon? N/A N/A
61849 6 series and 7 series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution N/A N/A
AR# 45934
Date Created 01/20/2012
Last Updated 07/14/2016
Status Active
Type Known Issues
Boards & Kits
  • Kintex-7 FPGA KC705 Evaluation Kit