UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 46246

Soft Error Mitigation - Virtex-7 SEM for SSI device

Description

Q1:

How much capacity does the SEM Controller require for a storage device targeting an XC7VX1140T device?

 

Q2:

How is the SEM controller implemented in XC7VX1140T? 

For an SSI device, does it need multiple SEM cores?

Solution

A1:

For error classification only, it would require a 512Mbit SPI Flash.

For classification and replace it would require a 1024Mbit SPI Flash.

 

A 2:

Child SEM is implemented in each SLR, and these controllers are merged as one controller. 

For details, please check an example design. You can create this by generating an SEM IP for SSI devices.

AR# 46246
Date Created 02/09/2012
Last Updated 10/23/2014
Status Active
Type General Article
Devices
  • Virtex-7
IP
  • Soft Error Mitigation