The Spartan-6 9K block RAM work-around in (Xilinx Answer 39999) does not work when using an XPS core as a submodule.
(Xilinx Answer 39999) explains how the XST switch "-infer_ramb8 NO" should be set to block the inference of 9K block RAM in XST.
The work-around of applying the three switches to XST, MAP and BITGENdescribed in (Xilinx Answer 39999) works correctly when using the ISE flow only.
However, for designs which contain XPS cores in the ISE project, the required XST switch is not passed to the EDK XST options.
To work around this issue, follow these steps: