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AR# 46398

13.3 Timing - MMCM timespec distribution of CLKOUTnB pins does not apply 180 degree of phase

Description

The MMCM timespec distribution of the CLKOUTnB pins does not apply 180 degree of phase in Timing Analysis.

For example, the period constraint of the MMCM input clock net:

NET "sys_clk_p" TNM_NET = "sys_clk_pin";

TIMESPEC TS_sys_clk_pin = PERIOD "sys_clk_pin" 200 MHz;

The auto-generated period constraint of the derived CLKOUTnB clock net:

TIMESPEC TS_U_hwsim_engine_clk_fx_int_180 = PERIOD "U_hwsim_engine_clk_fx_int_180" TS_sys_clk_pin * 0.5 HIGH 50%;

Solution

This issue is scheduled to be resolved in the next major release of the software.

The derived CLKOUTnB timespec should have 180 degree of phase compared to the MMCM input clock.

To work around this issue in 13.3, apply the period constraint of the CLKOUTnB clock net in UCF manually instead of the automatic period propagation.

For example:

NET "U_hwsim_engine_clk_fx_int_180" TNM_NET ="U_hwsim_engine_clk_fx_int_180";

TIMESPEC TS_U_hwsim_engine_clk_fx_int_180 = PERIOD "U_hwsim_engine_clk_fx_int_180" TS_sys_clk_pin * 0.5 phase + 5ns HIGH 50%;

AR# 46398
Date Created 03/12/2012
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Artix-7
  • Kintex-7
  • Virtex-6 CXT
  • More
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6Q
  • Virtex-6QL
  • Virtex-7
  • Virtex-7 HT
  • Less
Tools
  • ISE Design Suite - 13.3