I am using the IIC core.
How can I determine the frequency of SCL?
The SCL frequency is configurable.
Based on the frequency configuration, IIC master generates the required frequency.
The clock is based on setup/hold/low_time/high_time spec timings and is generated as per IIC protocol.
The clock generation is done via state-machine.
For an XPS based I2C controller the statemachine is available in iic_control.vhd ($EDK_Install\hw\XilinxProcessorIPLib\pcores\xps_iic_vx_xx_a\hdl\vhdl).
For a Vivado based I2C controller the statemachine is available in iic_control.vhd ($Vivado_Install\data\ip\xilinx\axi_iic_v2_0\hdl\src\vhdl).