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AR# 46742 Spartan-6 FPGA Design Assistant - Designing for I/O, PCIe, Memory Controller, and DSP in Spartan-6 FPGAs

Description

The following Answer Record points you to the information required for designing an I/O interface, PCIe, Memory Controller, and DSP.

NOTE:This Answer Record is part of the XilinxSpartan-6 FPGA Solution Center (Xilinx Answer 44744).The XilinxSpartan-6 FPGASolution Center is available to address all questions related toSpartan-6 devices.Whether you are starting a new design withSpartan-6 FPGA or troubleshooting a problem, use theSpartan-6 FPGA Solution Center to guide you to the right information.

Solution

Please refer to the following Solution Center Answer Records and User Guides which provide more information when designing for anI/O interface, PCIe, Memory Controller,or DSP design.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
44744 Spartan-6 FPGA Solution Center N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
46739 Spartan-6 FPGA Design Assistant - Designing for a Spartan-6 FPGA N/A N/A
37181 Xilinx High-Speed Serial I/O Solution Center N/A N/A

Actions

AR# 46742
Date Created 03/27/2012
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
  • Spartan-6Q
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