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AR# 47051

MIG Virtex-6 QDRII+ cq_n signals are removed in MAP


When using the MIG QDRII+ SRAM example design, the qdriip_cq_n signals are optimized away in MAP. 

Is this expected behavior?


These warnings can be safely ignored if the memory interface is running below 250MHz. 

The qdriip_cq_n clock is only used by the phase detector circuitry, but this logic is turned off for memory rates under 250MHz.  

As a result, these signals are not needed in QDRII+ designs running under 250 MHz.



Revision History:

2/09/2014  Updated for content



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AR# 47051
Date Created 03/29/2012
Last Updated 01/07/2015
Status Active
Type General Article
  • MIG Virtex-6 and Spartan-6