UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 47064

Virtex-7 FPGA - Speeds Files Revision History

Description

This answer record contains the Revision History for Virtex-7 family speeds files.

Solution

Speeds Files Revision History

1.09 Release: Description and Explanation of Changes - 14.5/2013.1

  • Updated IOB, RAM, FIFO and PCIe for Q-grade devices
  • Updated I/O Standards block for -1Q

1.08 Release: Description and Explanation of Changes - 14.4/2012.4

  • Updated PHYCONTROL hold specification for -2 speed grade devices
  • Status change to PRODUCTION for 7v585t -3 speed grade devices

1.07 Release: Description and Explanation of Changes - 14.3/2012.3

  • Updated PCIeblock
  • Updated Phaser and IOI block
  • Status change to PRODUCTION for 7v585t and 7vx485t devices

(7XV) 1.06

  • Updated Clocking
  • Updated PCIe

(Lower Power) 1.07

  • Updated block RAM and FIFO block
  • Updated IOI, IOB, Interconnect, & I/O Standards block
  • Updated CMT, MMCM and PLL block

1.06 Release: Description and Explanation of Changes - 14.2/2012.2

  • Updated CLB block
  • Updated SERDES, PhyController, IOI, IODELAY, and IOB block
  • Updated Clocking, MMCM and PLL block
  • Updated block RAM and FIFO block
(7XV) 1.04
  • Updated Clocking
  • Updated PCIe

(Lower Power) 1.06

  • Updated block RAM and FIFO block
  • Updated Phaser block
  • Updated IODELAY and IOB block

1.04 Release: Description and Explanation of Changes - 14.1/2012.1

  • Updated CLB block
  • Updated SERDES, PhyController, IOI, IODELAY, and IOB block
  • Updated Clocking, MMCM and PLL block
  • Updated block RAM and FIFO block

(7XV) 1.03

  • Updated Clocking
  • Updated PCIe

(Lower Power) 1.05

  • Updated block RAM and FIFO block
  • Updated Clocking, MMCM, and PLL block
  • Updated Phaser, DSP block
  • Updated CLB, IODELAY and IOB block

1.02 Release: Description and Explanation of Changes - 13.3

  • Updated block RAM and FIFO
  • Updated SERDES
  • Updated Clocking, MMCM and PLL block
  • Updated Phaser block
  • Updated IODELAY block

(7XV) 1.01

  • Updated Clocking
  • Updated PCIe

(Lower Power) 1.03

  • Updated SERDES
  • Updated Block RAM
  • Updated DSP
  • Updated MMCM and PLL
  • Updated Clocking
  • Updated PCIe

1.01 Release: Description and Explanation of Changes - 13.2

  • Updated Interconnect
  • Updated IOB
  • Updated DSP
  • Updated IODELAY
  • Updated Clocking
  • Updated PCI
  • Updated block RAM and FIFO
  • Updated MMCM and PLL

(7XV) 1.00

  • Updated Clocking
  • Updated PCIe
  • Change Label to Advanced

(Lower Power) 1.02

  • Updated DSP Block
  • Updated CLB block
  • Updated Clocking
  • Updated block RAM

1.00 Release: Description and Explanation of Changes - 13.1

  • Updated DSP block
  • Updated block RAM
  • Updated PLL, MMCM, and Clocking
  • Updated Interconnect

(Lower Power) 1.01

  • Updated DSP block
  • Updated block RAM
  • Updated PLL, MMCM, and Clocking
  • Updated Interconnect
AR# 47064
Date Created 03/30/2012
Last Updated 06/11/2013
Status Active
Type General Article
Devices
  • Virtex-7
  • Virtex-7 HT