UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 4711

M1.5 LOGIBLOX, NGDBUILD, SPARTAN, SPARTANXL -

Description

Keywords: LogiBLOX, comparator, wired AND, Spartan, maximum
speed, equal, RAM, NGDBuild

Urgency: Standard

General Description:
Wired ANDs may be inferred when a generating a "Comparators
and Memories" for Spartan-XL in LogiBLOX when the following
conditions hold:

COMPARATORS:

- Implementation Style is set to Maximum Speed
- The comparison to be implemented is "A=B" (Equality Check)
- Data width is greater than 4

MEMORIES:

Wired ANDs may also be inferred when generating a RAM
in LogiBLOX which has a depth of 64 or more.


This causes an error in NGDBUILD regarding an unsupported
architectural feature:

"ERROR:basnu:173 - The WAND symbol "L3/WAND_3" is not supported
in the spartanxl architecture. Of the currently installed architectures, the
following support WAND symbols: XC4000E, XC4000EX, XC4000XL,
XC4000XLA, XC4000XV."

Solution

1

Wired ANDs (WANDs) are supported in 4K architectures, but not in Spartan or
SpartanXL.

The problem was corrected for the Spartan architecture in M1.5, but still
exists for SpartanXL.

For all other releases, the work-around is to change the target architecture to
Spartan rather than SpartanXL. Since the same resources exist in both the
Spartan and Spartan-XL architectures, the implementation that targets Spartan
should also be valid for Spartan-XL.

2

For Comparators:

The alternate work-around is to explicitly set the implementation style to "Carry
Logic" instead of "Maximum Speed".
AR# 4711
Date Created 08/31/2007
Last Updated 02/15/2001
Status Archive
Type ??????