In certain cases, the link between a core configured for SGMII and the PHY has failures.
Due to some link integrity issues, auto-negotiation will not complete.
If auto-negotiation is turned off, the link comes up but TX data appears corrupted on the link partner RX side.
This issue applies to:
In the example_design/transceiver/gtwizard_gt.v/vhd wrapper generated by the CORE Generator tool, TXDIFFCTRL is set to 4'b0000 (which according to UG366, corresponds to 110mVppd).
The SGMII specification states TX output voltage must be between 150 - 400 mVpd (peak differential voltage).
Please note that the GTX TX swing is specified in peak-to-peak differential voltage (mVppd), thus TXDIFFCTRL should be set to 300 - 800 mVppd or 4'b0010 - 4'b1000 to meet the SGMII TX electrical specifications.
TXDIFFCTRL might still need to be adjusted for a particular setup depending on the characteristics of the channel.
A good setting to overcome most channel losses would be to use 740 mVppd or 4'b0111.
If you use IBERT to test the link quality, the link appears fine with low or no bit error.
This is because IBERT automatically defaults to a higher TXDIFFCTRL value when it is generated for gigabit Ethernet protocol.
06/20/2012 - Initial Release
09/05/2012 - Added notes that GTX takes in peak-to-peak value.