We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 47390

14.1 ChipScope IBERT - 7 Series GTH IBERT core bitstream uses generic bitstream name


This answer record discusses a possible issue with the 7 series GTH IBERT core bitstream naming scheme.


When using the 7 series GTH IBERT core, the output .bit file is given a generic naming scheme (e.g., example_7sgth_ibert.bit). This can cause an issue if you attempt to generate two designs with different names. If you generate one design with the name "ibert_bank_113", and another design with the name "ibert_bank_114_115", they both will have the same named .bit file and one design will overwrite the other .bit file.

To ensure that the .bit file does not get replaced, re-name the .bit file after its creation.

Linked Answer Records

Master Answer Records

AR# 47390
Date Created 05/07/2012
Last Updated 01/21/2013
Status Active
Type Known Issues
  • Virtex-7
  • Virtex-7 HT
  • ChipScope Pro - 14.1
  • ChipScope Pro IBERT for 7 Series GTH