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AR# 47443 Design Advisory for 7 Series FPGA GTH Transceiver Power-Up/Power-Down

This answer record discusses the 7 series GTH Transceiver power-up/power-down sequencing recommendations.

1. Recommended power-up/power-down sequence:

The recommended GTH transceiver power-on sequence is VCCINT, VMGTAVCC, VMGTAVTT or VMGTAVCC, VCCINT, VMGTAVTT to achieve minimum current draw. There is no recommended sequencing for VMGTVCCAUX. Both VMGTAVCC and VCCINT can be ramped up simultaneously. The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw.

If the recommended sequences are not met, current drawn from VMGTAVTT can be higher than specifications during power-up and power-down:

  • When VMGTAVTT is powered before VMGTAVCC, and VMGTAVTT - VMGTAVCC > 150 mV and VMGTAVCC < 0.7V, the VMGTAVTT current draw can increase by 460 mA per transceiver when VMGTAVCC is ramping up. The duration of the current draw can be up to 0.3* TMGTAVCC (ramp time from GND to 90% of VMGTAVCC). The reverse is true for power-down.
  • When VMGTAVTT is powered before VCCINT , and VMGTAVTT - VCCINT > 150 mV and VCCINT < 0.7V, the VMGTAVTT current draw can increase by 50 mA per transceiver when VCCINT is ramping up. The duration of the current draw can be up to 0.3* TVCCINT (ramp time from GND to 90% of VCCINT). The reverse is true for power-down.

2. For the 7 SeriesGTH TransceiverInitial and General ES Silicon ONLY

If the recommended power-up sequence is followed, while VMGTAVCC is powered within its recommended operating range and VMGTAVTT is below 0.7V, an additional 70 mA per GTH transceiver is drawn from VMGTAVCC. Depending on the number of transceivers used, this extra current could be greater than reported in XPE.

Follow this procedure to determine if the power supply regulator for VMGTAVCC is sufficient:

  1. Refer to Table 1: Virtex-7 FPGA GTX/GTH Transceiver Power Supply Grouping Per Package to determine the total number of QUADs per power supply grouping.
  2. Refer to Table 2: Total GTH VMGTAVCC Current for Number of QUADs in a Power Supply Grouping to determine the maximum VMGTAVCC current per power supply grouping.
  3. Calculate the VMGTAVCC power consumption per power supply grouping based on the number of transceivers used that are utilizing XPE in the GTH tab.
  4. If the current value obtained from XPE in Step 3 is greater than or equal to the current value obtained in Step 2, no change is required.
  5. If the current value obtained from XPE in Step 3 is less than the current value obtained in Step 2, it is recommended that the power supply regulator for VMGTAVCC be enhanced to account for this extra current.


Table 1: Virtex-7 FPGA GTX/GTH Transceiver Power Supply Grouping Per Package

MGT MGT MGT MGT MGT MGT MGT MGT MGT MGT MGT MGT
210 211 212 213 214 215 216 217 218 219 220 221
110 111 112 113 114 115 116 117 118 119 120 121
XC7V585T-FFG1157 G10 G10
(RCAL)
G10 G11 G11
XC7V585T-FFG1761 G10 G10 G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7V2000T-FHG1761 G10 G10
(RCAL)
G10 G10 G10
(RCAL)
G10 G11 G11
(RCAL)
G11
XC7V2000T-FLG1925 G10
(RCAL)
G10 G11 G11
(RCAL)
XC7VX330T-FFG1157 G10 G10
(RCAL)
G10 G11 G11
XC7VX330T-FFG1761 G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX415T-FFG1157 G10 G10
(RCAL)
G10 G11 G11
XC7VX415T-FFG1158 Left-side G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX415T-FFG1927 Left-side G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX485T-FFG1157 Left-side
Right-side G10 G10
(RCAL)
G10 G11 G11
XC7VX485T-FFG1761 Left-side
Right-side G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX485T-FFG1158 Left-side G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX485T-FFG1927 Left-side G20 G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX485T-FFG1930 Left-side
Right-side G10 G10 G10 G11
(RCAL)
G11 G11
XC7VX550T-FFG1158 Left-side G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX550T-FFG1927 Left-side G19 G19 G19 G20 G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G9 G9 G9 G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX690T-FFG1157 Left-side
Right-side G10 G10
(RCAL)
G10 G11 G11
XC7VX690T-FFG1761 Left-side
Right-side G10 G10 G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX690T-FFG1158 Left-side G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX690T-FFG1926 Left-side G20 G20 G21 G21 G21
(RCAL)
G22 G22 G22
Right-side G10 G10 G11 G11 G11
(RCAL)
G12 G12 G12
XC7VX690T-FFG1927 Left-side G19 G19 G19 G20 G20 G20
(RCAL)
G20 G21 G21 G21
Right-side G9 G9 G9 G10 G10 G10
(RCAL)
G10 G11 G11 G11
XC7VX690T-FFG1930 Left-side
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
XC7VX980T-FFG1926 Left-side G20 G20 G21 G21 G21
(RCAL)
G22 G22 G22
Right-side G10 G10 G11 G11 G11
(RCAL)
G12 G12 G12
XC7VX980T-FFG1928 Left-side G20 G20 G20
(RCAL)
G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
XC7VX980T-FFG1930 Left-side
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
XC7VX1140T-FLG1926 Left-side G20 G20
(RCAL)
G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G10 G10
(RCAL)
G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
XC7VX1140T-FLG1928 Left-side G20 G20 G20
(RCAL)
G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
G23 G23 G23
(RCAL)
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
G13 G13 G13
(RCAL)
XC7VX1140T-FLG1930 Left-side
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
(RCAL)
XCV7H580T-HCG1155 Left-side G20 G20 G20
(RCAL)
Right-side G10 G10 G10
(RCAL)
XCV7H580T-HCG1931 Left-side G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
XCV7H580T-HCG1932 Left-side G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
XCV7H870T-HCG1931 Left-side G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)
XCV7H870T-HCG1932 Left-side G20 G20 G20
(RCAL)
G21 G21 G21
(RCAL)
G22 G22 G22
(RCAL)
Right-side G10 G10 G10
(RCAL)
G11 G11 G11
(RCAL)
G12 G12 G12
(RCAL)

Notes:
(1) Power pins and pin-out for QUAD113 and QUAD213 are made available for seamless migration/swapping to the XC7VX485T, XC7VX550T and the XC7VX690T.
(2) Power pins and pin-out for QUAD110, QUAD210, QUAD111 and QUAD211 are made available for seamless migration/swapping to the XC7VX550T.

Table 2: Total GTH VMGTAVCC Current for Number of QUADs in a Power Supply Grouping

Number of QUADs in a Power Supply Group

VMGTAVCC Current per Power Supply Group (mA)

6

1680

4

1120

3

840

2

560

1

280

3. Frequently Asked Questions:

  1. Simultaneous power-up: Is it okay to simultaneously power-up VMGTAVCCand VMGTAVTT, or VCCINTand VMGTAVTT, or all three? Does the additional current draw still apply?

During power-up, if VMGTAVCC < 0.7V (Time "T1" in the picture) and VMGTAVTT - VMGTAVCC <= 150 mV, then there is no additional current draw. During power-up, if VMGTAVCC >= 0.7V (Time "T1" in the picture), then there is no additional current irrespective of VMGTAVTT value.

During power-up, if VMGTAVCC < 0.7V (Time "T1" in the picture) and VMGTAVTT VCCINT <= 150 mV, then there is no additional current draw. During power-up, if VCCINT >= 0.7V (Time "T1" in the picture), then there is no additional current irrespective of VMGTAVTT value.

If these conditions cannot be met, then the additional current needs to be accounted for.

2. Are these additional currents on VMGTAVTT cumulative when both sequences of VMGTAVTT vs VMGTAVCC and VMGTAVTT vs VCCINT are not followed?

The power supply current increase is cumulative. So if both conditions occur simultaneously, the total is 510 mA extra on VMGTAVTT.

3. What is the impact of this additional current and when does this happen?

This additional current happens only on the power-up and power-downramp. Once the GTH transceivers are powered up and running, then this has no impact.

4.What are the key things to keep in mind for the recommended power sequencing to avoid the additional current draw?

VMGTAVTT must be powered up last. VMGTAVCC and VCCINT mustbe powered up before VMGTAVTTbut they can be in any order. VMGTAVCCAUX has no recommended sequencing. These are the criterion that ensure the recommended sequencing is met and there is no current draw.

Revision History
11/09/2012 - Updated Table 1 with the latest information to include all Virtex-7 devices and packages.
08/22/2012 - Added a note that section (2) applies to Initial and General ES GTH silicon only.
08/17/2012 - Updated the VMGTAVTT additional current draw value to 460 mA When VMGTAVTT is powered before VMGTAVCC, and VMGTAVTT - VMGTAVCC > 150 mV and VMGTAVCC < 0.7V.
07/19/2012 - More clarification added - Updated with information about duration of current draw, simultaneous power-up and more FAQs.
06/08/2012 - Added the power sequencing recommendations and the FAQ section.
05/23/2012 - Updated the title to say transceiver power-up.
05/02/2012 - Initial release

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
42944 Design Advisory Master Answer Record for Virtex-7 FPGA N/A N/A
AR# 47443
Date Created 05/02/2012
Last Updated 11/12/2012
Status Active
Type Design Advisory
Devices
  • Virtex-7
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