Using the hardened QSPI controller in the Processing System (PS) block of Zynq-7000 SoC, how large of a device can I use?
Solution
The controller currently supports a maximum chip size of 16 MB for Linear Addressing Mode. You are able to connect a maximum of two 16 MB parts, as described in UG585 (the Zynq TRM), for a maximum linearly addressable space of 32 MB.