We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 47522

Zynq-7000 AP SoC, DDR - DCI does not work


DDRIOB has issues with the DCI state machine and cannot dynamically determine the setting for proper impedance matching. This results in DDR2/DDR3 input termination and LPDDR2 output drive strength not matched to the DCI reference resistors.


Impact: Minor.

Work-around: None.

Configurations Affected: Systems using the DDR memory controller (DDR2, DDR3 and LPDDR2)

Device Revision(s) Affected: Refer to the Zynq-7000 AP SoC - Design Advisory Master Answer Record (Xilinx Answer 47916).
AR# 47522
Date Created 05/24/2012
Last Updated 10/03/2012
Status Active
Type Design Advisory
  • Zynq-7000