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AR# 47573

Zynq-7000 AP SoC, Boot - BootROM Floats Boot Device I/O Interface Signals

Description

The data I/O buses of NAND, NOR, and Quad-SPI devices on the MIO pins are left floating by the BootROM, leading to higher power consumption. In non-secure boot modes, the work-around is to enable the weak internal pull-up resistors on the MIO pins during the boot process.

Solution

Impact: Trivial. There is no functional impact to the user.

Work-around: Enable internal pull-ups by writing to the slcr.PIN_MUX_xx registers during the boot process by creating set commands in an .INT file and link it into the Boot Image using BootGen. Refer the Software Developers Guide for information on the .INT file syntax and BootGen procedures.

Configurations Affected: All.

Device Revision(s) Affected: Refer to (Xilinx Answer 47916) - Zynq-7000 AP SoC Silicon Revision Differences.

Enable internal pull-ups by writing to the slcr.PIN_MUX_xx registers during the boot process by creating set commands in an .INT file and link it into the Boot Image using BootGen. Refer the Software Developers Guide for information on the .INT file syntax and BootGen procedures.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
47916 Zynq-7000 AP SoC Devices - Silicon Revision Differences N/A N/A
AR# 47573
Date Created 05/24/2012
Last Updated 06/04/2013
Status Active
Type Design Advisory
Devices
  • XA Zynq-7000
  • Zynq-7000
  • Zynq-7000Q