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AR# 47594

Zynq-7000 AP SoC, Boot - During NOR Boot, MIO 1 pin is set to Address bit 25


MIO 1 pin is a multifunction pin. During NOR boot, the pin is configured as address bit 25 and will be driven low when the system boots from the NOR device. MIO 1 pin must not be connected as a chip select to a second SRAM/NOR device or be used in a way to adversely affect other board logic during boot.


Impact:Minor. MIO1 can not directly be used as chip select for the SRAM device.

Work-around:External board logic is needed to disable the SRAM device during boot.

ConfigurationsAffected:Systems that utilize NOR Boot mode and an SRAM device.

Device Revision(s) Affected: Refer to Zynq-7000Device Advisory Master Answer Record

AR# 47594
Date Created 08/01/2012
Last Updated 02/11/2013
Status Active
Type Design Advisory
  • Zynq-7000