^

AR# 47773 MIG 7 Series DDR3 RDIMM - Designs are not working in hardware


Version Found: v1.5
Version Resolved and other Known Issues: See (Xilinx Answer 45195).

All MIG 7 series DDR3 RDIMM designs will fail in hardware during DQS Found Stage of calibration (pi_dqs_found_error=1) as a result of the MRS programming sequence being handled incorrectly. This is due to the chip select logic always holding chip select (cs_n) Low that causes calibration to continuously program MRS registers which corrupts the MRS sequencing.

The chip select (cs_n) signal needs to be active each time a valid command is available at the interface. Please open a WebCase with Xilinx Technical Support for a work-around.
AR# 47773
Date Created 05/07/2012
Last Updated 05/07/2012
Status Active
Type
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series
Feed Back