To begin debugging a suspected hardware issue on the ZC702, please see (Xilinx Answer 54012) Zynq-7000 AP SoC ZC702 Evaluation Kit - Board Debug Checklist.
The ZC702 Board Debug Checklist forms part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center.

Known Issues:

Board and Kit Related Issues
(Xilinx Answer 50664) 14.1 Zynq - PL power-off support (independent from PS) on the ZC702 board
(Xilinx Answer 50650) ZC702 - The SD card might need to be re-imaged in order to boot
(Xilinx Answer 51438) ZC702 - PG signal does not assert by default
(Xilinx Answer 51753) ZC702 - Temporary Deviation of QSPI PROM Devices on Revision 1.0 Evaluation Boards
(Xilinx Answer 52184) Zynq-7000 AP SoC ZC702 Evaluation Kit - How does SW16 correlate to jumpers J20, J21, J22, J25, and J26?
(Xilinx Answer 52252) Zynq-7000 AP SoC ZC702 Evaluation Kit TRD - Why is my 1080p60 input not being detected when using the Avnet IMAGEON FMC daughter card with the 14.1 or 14.2 TRD design?
(Xilinx Answer 50875) Zynq-7000 SoC ZC702 Evaluation Kit - Why does my board not have the SW16 switch as shown in the User Guide?
(Xilinx Answer 53615) Zynq-7000 AP SoC ZC702 Evaluation Kit - INIT LED unexpectedly goes red
(Xilinx Answer 53737) Zynq-7000 AP SoC ZC702 Evaluation Kit - Rev 1.1 - USB drive no longer provided in the box

Documentation Related Issues
(Xilinx Answer 51110) ZC702 - XADC_VCC5V0 jumper setting to enable AMS evaluation
(Xilinx Answer 51220) ZC702 - Master UCF (Rev1.0) shows incorrect IOSTANDARD for USRCLK_N / _P
(Xilinx Answer 51774) ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.0 (UG850) - UCD9248 Designators Incorrect
(Xilinx Answer 52321) Zynq-7000 ZC702 Getting Started Guide (UG926) - Default Jumper and Switch Settings
(Xilinx Answer 52563) ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - Marvel 88E1111 device or Marvel 88E1116R device on this board?
(Xilinx Answer 52705) ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - HDMI_D Connections
(Xilinx Answer 52937) ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.1 (UG850) - SPI part number correction
(Xilinx Answer 53060) ZC702 Evaluation Board for the Zynq-7000 XC7Z020 AP SoC User Guide v1.0 (UG850) - SiT9102 Oscillator frequency stability incorrect
(Xilinx Answer 53067) Zynq-7000 AP SoC ZC702 Evaluation Kit - Board Temperature Specifications
(Xilinx Answer 54188) Zynq-7000 AP SoC ZC702 Evaluation Kit - UG850 (v1.1) - VCC12_P_IN LED is DS14

Silicon Related Issues
(Xilinx Answer 47915) - Design Advisory Master Answer Record for Zynq-7000 AP SoC Devices

PCI Express Related Issues
None

Design Tools Related Issues
(Xilinx Answer 51235) Zynq-7000 14.1/14.2 - Xilinx QSPI Programming tools (SDK and iMPACT) supports external loopback capable designs
(Xilinx Answer 52143) 14.x Zynq-7000 SoC AP Impact - QSPI programming on the ZC702 (7020 rev1.0 silicon) requires the board to be in QSPI mode

Useful Information:

Third Party Debug Tool Information
(Xilinx Answer 46881) Zynq-7000 - How to setup a third-party debug environment on the ZC702 board
(Xilinx Answer 47767) Zynq-7000, ZC702 - Lauterbach Startup Script

Reference Design Information
(Xilinx Answer 46880) Zynq-7000 Example Design - Linear QSPI Performance (Max Effective Throughput)
(Xilinx Answer 46915) Zynq-7000 Example Design - Setup the TRACE port via EMIO on the ZC702 board
(Xilinx Answer 50572) Zynq-7000 Example Design - Interrupt handling of PL generated interrupt

AMS101 Information
(Xilinx Answer 51214) AMS101 - Information on establishing a connection to the GUI