Visit ((Xilinx Answer 47915) for a comprehensive list of Xilinx generated Zynq-7000 AP SoC documents. In some cases, especially those involving ARM IP, it is necessary to reference documents from other companies.It is recommend to start with Xilinx documentation.
Link to (Xilinx Answer 51010) Zynq-7000 Master Documentation List.
3rd Party IPUnits, their Revision, and Related Document(s)
The Supplier and Version information is also available in the Zynq-7000 Technical Reference Manual.
Unit |
Supplier |
Version |
Supplier and Industry Standard Documents |
Cortex-A9 MPCore (APU) |
ARM |
r3p0 |
Refer totext, below. |
AMBA Level 2 Cache Controller (PL310) |
ARM |
r3p2 |
Refer totext, below. |
PrimeCell Static Memory Controller (PL353) |
ARM |
r2p1 |
Refer to text, below. |
PrimeCell DMA Controller (PL330) |
ARM |
r1p1 |
Refer to text, below. |
CoreLink Network Interconnect (NIC-301) |
ARM |
r2p2 |
Refer to text, below. |
DesignWare Cores IntelliDDR Multi Protocol Memory Controller (DDRC) |
Synopsys |
A07 |
|
USB 2.0 High Speed Atlantic Controller (USB) |
Synopsys |
2.20a |
* Intel Corp., Enhanced Host Controller Interface Specification for Universal Serial Bus, v1.0, 2002
* ISO 11898 Standard USB Association, USB 2.0 Specification |
Watchdog Timer (SWDT) |
Cadence |
Rev 07 |
* Cadence, Watchdog Timer (SWDT) Specification |
Inter Intergrated Circuit (IIC) |
Cadence |
r1p10 |
|
Gigabit Ethernet MAC (GigE) |
Cadence |
r1p23 |
* IEEE 802.3-2008 - IEEE Standard for Information technology-Specific requirements - Part 3:Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, 2008 |
Serial Peripheral Interface (SPI) |
Cadence |
r1p06 |
|
Universal Asynchronous Receiver Transmitter (UART) |
Cadence |
r1p08 |
|
Triple Timer Counter (TTC) |
Cadence |
Rev 06 |
|
SD2.0/SDIO2.0/MMC3.31 AHB Host Controller (SDIO) |
Arasan |
8.9A_apr02nd_2010 |
* SD Association, Part A2 SD Host Controller Standard Specification Ver2.00 Final 070130
* SD Association, Part E1 SDIO Specification Ver2.00 Final 070130
* SD Group, Part 1 Physical Layer Specification Ver2.00 Final 060509 |
| CAN Controller | Xilinx | na | * BOSCH, CAN Specification Version 2.0 PART A and PART B, 1991 |
ARM Documents
Note: ARM documents can be found at: http://infocenter.arm.com/help/index.jsp
APU
Cortex-A Series Programmer's Guide
Cortex-A9 Technical Reference Manual
Cortex-A9 MPCore Technical Reference Manual (DDI0407F) includes descriptions for accelerator coherency port (ACP), CPU private timers and watchdog timers (AWDT), event bus, general interrupt controller (GIC), and snoop control unit (SCU)
Cortex-A9 NEON Media Processing Engine Technical Reference Manual
Cortex-A9 Floating-Point Unit Technical Reference Manual
AXI/AHB/APB
AMBA Level 2 Cache Controller (L2C-310) TRM (also called PL310)
AMBA Specification Revision 2.0, 1999 (IHI 0011A)ARM Architecture Reference Manual (Need to register with ARM)
Debug
CoreSight v1.0 Architecture Specification includes descriptions for ATB Bus, and Authentication
CoreSight Program Flow Trace Architecture Specification
Debug Interface v5.1Architecture Specification
Debug Interface v5.1 Architecture Specification Supplement
CoreSight Components TRM includes descriptions for embedded cross trigger (ECT), embedded trace buffer (ETB), instrumentation trace macrocell (ITM), debug access port (DAP), and trace port interface unit (TPIU)
CoreSight PTM-A9 TRM
CoreSight Trace Memory Controller Technical Reference Manual
Interrupt Controller
Generic Interrupt Controller v1.0 Architecture Specification (IHI 0048B)
Generic Interrupt Controller PL390 Technical Reference Manual (DDI0416B)
DMA Controller
PrimeCell DMA Controller (PL330) Technical Reference Manual
Application Note 239: Example programs for CoreLink DMA Controller DMA-330
SMC Controller
PrimeCell Static Memory Controller (PL350 series) Technical Reference Manual, Revision r2p1, 12 October 2007 (ARM DDI 0380G)
Nov 20, 2012: rde: converted AR exclusively to IP Supplier Docs.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 52010 | Zynq-7000 AP SoC - Documentation Summary | N/A | N/A |