BUFG, or BUFH, with certain limitations, must be used between TXOUTCLK/RXOUTCLK and MMCM or PLL in all Artix-7 devices. For details about placement constraints and restrictions on clocking resources (MMCM, BUFR, BUFH, BUFG, etc.), refer to UG472, 7 Series FPGAs Clocking Resources User Guide.
The incorrect information about BUFR usage is fixed in the next revision of the user guide, v1.2.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 47852 | 7 Series FPGAs GTP Transceivers - Known Issues and Answer Record List | N/A | N/A |