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AR# 492

FPGA Configuration - Minimum pulse width for PROG to reconfigure/clear an FPGA


General Description:

What is the required pulse width for PROG to clear the configuration memory of an FPGA?


The PROGRAM pin must be held Low for at least 300 ns. This applies to all XC4000/XC5200, Spartan/-II/-IIE/-3, and Virtex/-E/-II/-II Pro devices.

AR# 492
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article