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AR# 50379

7 Series FPGAs - What are the Addresses and Values for Dynamic Reconfiguration of the MMCM/PLL through the DRP?


The DRP functionality for the 7 series FPGA MMCM and PLL is supported through an Application Note and associated reference design.


XAPP888 MMCM and PLL Dynamic Reconfiguration, http://www.xilinx.com/support/documentation/application_notes/xapp888_7Series_DynamicRecon.pdf, describes the DRP feature in detail. An HDL reference design is provided along with the Application Note. The reference design uses a state machine to drive the DRP and ensures the registers are controlled in the correct sequence.
AR# 50379
Date Created 06/08/2012
Last Updated 06/08/2012
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7