UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 50720

XADC Wizard v2.1/v2.2 - Release Notes and Known Issues for the XADC Wizard

Description

This Release Note is for the XADC Wizard v2.1 released in ISE Design Suite 14.2, and the XADC Wizard v2.2 released in Vivado 2012.2 tools which contain the following information:

  • General Information
  • New Features
  • Bug Fixes
  • Known Issues
  • Device Support

Solution


General Information

The XADC Wizard v2.1 and v2.2 supports the 7 series and Zynq devices. You can use the Wizard to customize the I/O Ports usage, the User Alarms and Thresholds, and the Channel Sequencer.

New Features in v2.1 and v2.2

There are no new features in v2.1 and v2.2.

Bug Fixes in v2.1 and v2.2

There are no bug fixes in v2.1 and v2.2.

Known Issues v2.1

There are currently no known issues for the v2.1 XADC Wizard.

Known Issues v2.2

In the v2.2 XADC wizard there two known issues.

NOTE: The Vivado tool might issue a warning on the setup time while running timing simulation of XADC Wizard example designs. This is due to the routing delay on DADDR and RESET input with reset to the clock. The Vivado tool issues a critical warning similar to the following if implementing a Verilog project due to instance name INST in upper case:

"CRITICAL WARNING: [Designutils 20-1275] Could not find cell 'inst' within module 'core'" .

To work around the issue, change INST to inst in the <component_name>.v.

Revision History
7/25/2012 - Initial Release
AR# 50720
Date Created 07/10/2012
Last Updated 07/16/2012
Status Active
Type General Article
Devices
  • Zynq-7000
  • Artix-7
  • Kintex-7
  • More