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AR# 50739

MIG 7 Series - Does MIG allocate memory interface pins on the reserved PUDC_B configuration pin?


The MIG 7 series GUI prior to the v1.6 release (available with 14.2) did not prohibit memory interface pins from being allocated on the reserved PUDC_B configuration pin.

This pin requires a strong pull-up or pull-down during configuration and because of this it cannot be used for memory pins.


Starting in MIG v1.6, the PUDC_B pin will no longer be used in pin allocation. 

If using the "New Design" bank selection method in the GUI, MIG will not allow the entire byte group containing the PUDC_B pin to be used (Bank 14, Byte T0). 

The PUDC_B pin is located on a dedicated DQS strobe pin, so it is not possible to use this byte lane for data as DQS cannot be placed.

However, this byte group can be used for address/control signals by using the "Fixed Pin Out" mode.

While the standard MIG flow prevents PUDC_B usage, there are some cases (such as batch mode) where the pin is allocated or passes the pin verification process. 

This issue will be resolved in MIG v1.7 to be released with ISE 14.3 Design Suite.

AR# 50739
Date Created 07/12/2012
Last Updated 08/13/2014
Status Active
Type Known Issues
  • Artix-7
  • Kintex-7
  • Virtex-7
  • MIG 7 Series