Both PlanAhead and Vivado INIT attribute values are displayed in Verilog format regardless of the project settings being VHDL or Verilog.
For example, the Flip-Flop INIT value shown in the Netlist Instance Attributes pane as either 1'b0 or 1'b1.
The LUT INIT attribute value was designed to be displayed in Verilog format and has no connection to the selected HDL language of the project.
Due to customer feedback, in Vivado 2012.3, the format of the INIT value has been changed to a more generic format that will not be associated with a specific HDL language.