The Virtex-7 FPGA VC707 Evaluation Kit schematic includes the FMC1 and FMC2 headers for interaction between the VC707 and attached VITA 57.1-compliant mezzanine cards.
However, the HB bus pins for the FMC2 header are not present in the schematic.
Does the VC707 support the HB bus on its FMC2 header?
The Virtex-7 FPGA VC707 Evaluation Kit supports the FFG1761 package.
It was originally intended that this kit would go to market with the XC7V585T device on board, but instead this kit has the XC7VX485T in the FFG1761 package on board.
The XC7VX485T device has less banks than the XC7V585T in the same package, and some banks are not present on this kit, namely Banks 31, 32, 12, and GT banks 111, and 112.
As a result, the FMC2 header cannot support HB bus signals, but does support HA and LA signals.
This means that while FMC1 supports the full complement of 80 differential user-defined pairs (34 LA pairs, 24 HA pairs, 22 HB pairs), the FMC2 header does not.
The FMC2 header supports 58 differential user-defined pins (34 LA pairs, 24 HA pairs).
The VC707 Evaluation Board for the Virtex-7 FPGA User Guide (UG885) v1.2 and later accurately reflects the situation with the FMC2 header on the VC707.
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