Note: An Example Design is an answer record that provides technical tips to test a specific functionality on Zynq-7000. A tip can be a snippet of code, a snapshot, a diagram or a full design implemented with a specific version of the Xilinx tools. It is up to the user to "update" these tips to future Xilinx tools releases and to "modify" the Example Design to fulfill his needs.  Limited support is provided by Xilinx on these Example Designs.

a.       Open Program FPGA 

b.       Select Bitstream: system.bit

c.       Select BMM File: system_bd.bmm

d.       Software Configuration: microblaze_0, bootloop

e.       Program

f.        Download.bin is created

5.       Create BOOT.BIN

a.       Open Create Boot Image
b.       Add the zynq_fsbl_0.elf
c.       Add the bitstream download.bin
d.       Add the u-boot.elf
e.       Create Image
f.        BOOT.bin is created

6.       Copy BOOT.BIN in your SD card
7.       Setup your terminal ( BAUD 115200 )
8.       Boot Zynq in SD mode
9.       Stop at u-boot prompt
10.     Connect with XMD: connect mb mdm
11.     Take note of the TCP PORT No ( 1234 )
12.     Debug As for hello_world_on_mb

a.      Choose Debug Configuration
b.      Enable Remote Debug
c.      Port number ( 1234 )
d.      Debug

13.   Verify u-boot is still running
14.   Run the debug
15.   Hello World output by MicroBlaze appears on the Terminal