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AR# 50885

Logicore IP Aurora 64B66B v7.2 - Compile error while using the script implement_synplify.bat/implement_synplify.sh to implement the example design

Description

If implement_synplify.bat/implement_synplify.sh is used to implement the example design, the following error will occur:

Reference to undefined module aurora_64b66b_dup_core, the "aurora_64b66b_dup_core" module is not found in the run

This Answer recordhelps to resolve this error

Solution

The compilation of <component name>_core.v[hd] file is missing insynplify.prj file and is causing compilation error.
Add the following line to the synplify.prj file
Verilog:
add_file -verilog "../../<component name>_core.v"
VHDL:
add_file -vhdl "../../<component name>_core.vhd"
Revision History:
1.0 - Initial release
AR# 50885
Date Created 07/24/2012
Last Updated 11/28/2012
Status Active
Type General Article
Tools
  • ISE Design Suite - 14.2
IP
  • Aurora 64B/66B