This is the tactical speed file patch to provide the slower speedfiles for 7 series GES/IES -2 devices for ISE Design Suite 14.2 (P.28xd) and Vivado Design Suite 2012.2.
At the end of this answer record are links to the individual patch for each GES/IES device:
Applying the Patch
The patch can be applied to ISE design tools using the MYXILINX environment variable, or to Vivado tools using the MYVIVADO environment variable.
For information on how to set environment variables, see (Xilinx Answer 11630).
For information on how to use the MYXILINX environment variable, see (Xilinx Answer 2493).
MYVIVADO is used in the same way as MYXILINX.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 50906 | Design Advisory for Production Kintex-7 325T, 410T, 420T and Virtex-7 485XT, 690XT - Bitstream compatibility requirements between GES and Production devices | N/A | N/A |
| 45382 | Virtex-7 FPGA VC707 Evaluation Kit - Known Issues and Release Notes Master Answer Record | N/A | N/A |
| 45934 | Kintex-7 FPGA KC705 Evaluation Kit - Known Issues and Release Notes Master Answer Record | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 47787 | Design Advisory Master Answer Record for Kintex-7 FPGA KC705 Evaluation Kit | N/A | N/A |
| 45679 | Kintex-7 FPGA Base Targeted Reference Design - Release Notes and Known Issues Master Answer Record | N/A | N/A |
| 53392 | 14.4/2012.4 Speed Files - Tactical Patch for 7 Series GES/IES -2 Devices | N/A | N/A |