We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 50899

14.x Timing Analyzer - Incorrect values in the data sheet section when tri-state buffers are used with OFFSET OUT constrain


The data sheet section of the Timing Report shows the same output delays for paths coming from different sources.


The delay reported refers to the path coming to the Enable signal for the tri-state buffer and for the data it shows the same value. This can happen when the tri-state output buffers are instantiated/inferred. 928895_OBUFT_tristate_path_datasheet_val.JPG

This is a known issue with the data sheet section of the Timing Report.

The values in the detailed section of the Timing Report are correct.


AR# 50899
Date Created 11/12/2012
Last Updated 11/12/2012
Status Active
Type General Article
  • Spartan-6
  • ISE Design Suite - 13
  • ISE Design Suite - 14