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AR# 50927

LogiCORE IP Floating Point Operator (FPO) v6.1 - Why do I get a "Failed to compile" error when attempting to use the Vivado Simulator 2012.2 tool?

Description

Why do I get the following "Failed to compile" error when attempting to use the Vivado Simulator 2012.2 tool?

Floating point_v6.1 core XSIM  vivado simulation failed with the following error.
INFO: [Runs 36-130] *** Running xelab
ERROR: [Runs 36-25] xelab application returned error(s). Please see '/proj/xresults/arizona/test/vivsim_xsim/coregenIP/14.2_0625/lin64/floating_point_v6_1/DEF
ERROR: [Common 17-69] Command failed: Failed to compile the design!
INFO: [Common 17-206] Exiting Vivado...

Solution

This is a known issue with the Vivado Simulator 2012.2 tool, which is resolved in version 2012.3.

(Xilinx Answer 50909) - Vivado Simulator 2012.2 behavioral simulation, is not support when using the Floating Point Operators v6.1.

For a detailed list of LogiCORE Floating Point Operator Release Notes and Known Issues, see (Xilinx Answer 29598).

AR# 50927
Date Created 10/03/2012
Last Updated 10/09/2013
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • Vivado Design Suite - 2012.2
IP
  • Floating-Point Operators