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AR# 50961

ISE 14.2/Vivado 2012.2 - Release Notes and Known Issues for Distributed Memory Generator v7.2

Description

This Release Notes and Known Issues Answer Record is for the Distributed Memory Generator v7.2 Core, released in the ISE 14.2 and Vivado 2012.2 Design Suites and contains the following information:

1. Introduction
2. New Features
    2.1 ISE Design Suite
    2.2 Vivado Design Suite
3. Supported Devices
    3.1 ISE Design Suite
    3.2 Vivado Design Suite
4. Resolved Issues
    4.1 ISE Design Suite
    4.2 Vivado Design Suite
5. Known Issues
    5.1 ISE Design Suite
    5.2 Vivado Design Suite
6. Technical Support

For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at:
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

Solution

1. INTRODUCTION

For installation instructions for this release:
http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm

For system requirements:
http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm

This file contains release notes for the Xilinx LogiCORE IP Distributed Memory Generator v7.2

For the latest core updates, see the product page at:
http://www.xilinx.com/products/ipcenter/DIST_MEM_GEN.htm


2. NEW FEATURES

2.1 ISE Design Suite

  • ISE 14.2 design tools support
  • Example test bench support

2.2 Vivado Design Suite

  • 2012.2 tool support
  • Example test bench support
  • XSIM Simulator support


3. SUPPORTED DEVICES

3.1 ISE Design Suite

The following device families are supported by the core for this release:

  • All 7 series devices
  • Zynq-7000 devices
  • All Virtex-6 devices
  • All Spartan-6 devices
  • All Virtex-5 devices
  • All Spartan-3 devices
  • All Virtex-4 devices

3.2 Vivado Design Suite

  • All 7 series devices
  • Zynq-7000 devices


4. RESOLVED ISSUES

4.1 ISE Design Suite

  • N/A

4.2 Vivado Design Suite

  • N/A


5. KNOWN ISSUES

5.1 ISE Design Suite

There are no known issues for v7.2 of this core at time of release.

5.2 Vivado Design Suite

The following are known issues for v9.2 of this core at time of release:

  • Description: When trying to upgrade to latest version of DMG from older verions, the following error message occurs:
    "ERROR: [Common 17-69] Command failed: invalid command name "puts" and Auto Upgradation does not work."      
    CR: 665836

Technical Support

To obtain technical support, create a WebCase at www.xilinx.com/support. Questions are routed to a team with expertise using this product.

Xilinx provides technical support for use of this product when used according to the guidelines described in the core documentation, and cannot guarantee timing, functionality, or support of this product for designs that do not follow specified guidelines.

AR# 50961
Date Created 07/23/2012
Last Updated 11/19/2013
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • ISE Design Suite - 14.2
  • Vivado Design Suite - 2012.2
IP
  • Distributed Memory Generator