Does Vivado Synthesis currently support the MAX_FANOUT attribute with reference to edif netlist files?
The Vivado Synthesis tool expects the MAX_FANOUT synthesis attribute to be added in the RTL and can be set as follows:
(* max_fanout = 50 *) reg sig1;
If the loads of sig1 (as mentioned in the above example) drive the edif netlist instantiated in your code, then this register will not be replicated.
As stated in the Vivado Design Suite Synthesis User Guide v2012.2 (UG901) page 36, black boxes are not currently supported for max_fanout. The edif netlists are black boxes; as a result the register which drives the edif netlist is not duplicated. Reading and modification of the inside of an edif netlist for replication purposes will be supported in Vivado Synthesis tool in a future release.
Currently, if you need to duplicate registers to reduce fanout inside the black box, the edif netlist file will have to be manually modified. The Vivado Design Suite Synthesis User Guide v2012.3 (UG901) has been updated with the relevant details.