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AR# 51338

Design Advisory Master Answer Record for LogiCORE IP Video Deinterlacer

Description

Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.

This Design Advisory covers the LogiCORE IP Video Deinterlacer Core.

To update your Xilinx Alert Notification Preferences, please go to: http://www.xilinx.com/support/myalerts

Solution

For a list of all current Release Notes and Known Issues for Xilinx Solutions for the Video Deinterlacer, please refer to the IP Release Notes Guide:
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

Design Advisory Alerted on August 27, 2012:
(Xilinx Answer 50586) Design Advisory for LogiCORE IP Video Deinterlacer v2.00a - Why do I always receive zeros back when reading from the Video Deinterlacer Registers?

Revision History
08/23/2012 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
41969 LogiCORE IP Video Deinterlacer - Release Notes and Known Issues N/A N/A

Child Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
41969 LogiCORE IP Video Deinterlacer - Release Notes and Known Issues N/A N/A
33867 Design Advisories for LogiCORE IP Video Scaler N/A N/A
AR# 51338
Date Created 08/22/2012
Last Updated 08/23/2012
Status Active
Type Design Advisory
IP
  • Video Deinterlacer