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AR# 5140

4.1i FPGA Editor - Hard Macro: Using the Three-State IOB Flip-Flop in XC4000XLA, XC4000XV, and newer architectures


General Description:

A new flip-flop was introduced in our newer architectures -- it is connected to the tri-state enable of the OBUFT, which allows for faster output enable and disable times. How does one get this flip-flop into the IOB?


Utilization of this flip-flop is explained in (Xilinx XAPP123): "Using Three-State Enable Registers in XLA, XV, and Spartan-XL FPGAs."

The associated PERL script can be found on the Xilinx FTP site:

For the PC:


For the Workstation:


AR# 5140
Date Created 08/31/2007
Last Updated 01/18/2010
Status Archive
Type General Article