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AR# 51596

Design Advisories for 7 Series/Virtex-6/Spartan-6 Integrated Block and Virtex-5 FPGA Endpoint Block Plus Wrapper for PCI Express

Description

Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.

Solution

For the Solution Center for PCI Express, refer to (Xilinx Answer 34536).

(Xilinx Answer 56891) - Design Advisory for the 7 Series FPGA Integrated Block Wrapper for PCI Express
(Xilinx Answer 33775) - Design Advisory for the Virtex-6 FPGA Integrated Block Wrapper for PCI Express
(Xilinx Answer 33776) - Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper for PCI Express
(Xilinx Answer 33580) - Design Advisory for the Virtex-5 FPGA Endpoint Block Plus Wrapper for PCI Express 

Note: For 7 Series FPGA Integrated Block Wrapper for PCI Express, please also refer to the core release notes. 

Design Advisory for other Xilinx PCI Express cores are listed in the respective core release notes.

Revision History
09/03/2012 - Initial release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34536 Xilinx Solution Center for PCI Express N/A N/A
AR# 51596
Date Created 09/04/2012
Last Updated 02/06/2015
Status Active
Type Design Advisory
IP
  • 7 Series Integrated Block for PCI Express (PCIe)
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
  • Virtex-5 Endpoint Block Plus Wrapper for PCI Express ( PCIe )
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )