This section of the MIG 7 Series Design Assistant focuses on Core Functionality of the MIG 7 Series designs. Please select from the below options to find information related to your specific question.
NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
Supported Features (Xilinx Answer 51676)
Performance (Xilinx Answer 51705)
Controller (Xilinx Answer 34905)
User Interface (Xilinx Answer 34790)
PHY (Xilinx Answer 51898)
Clocking (Xilinx Answer 40603)
Example Design versus User Design (Xilinx Answer 34319)
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 51313 | Xilinx MIG 7 Series Solution Center - Design Assistant | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 40603 | MIG 7 Series FPGAs DDR3/DDR2 - Clocking Guidelines | N/A | N/A |
| 51676 | MIG 7 Series Solution DDR2/DDR3 - Supported Features | N/A | N/A |
| 34905 | MIG 7 Series and Virtex-6 DDR2/DDR3 Solution Center Design Assistant - Reordering Memory Controller | N/A | N/A |
| 51705 | MIG 7 Series Solution Center - Design Assistant - Performance | N/A | N/A |
| 51898 | MIG 7 Series DDR3/DDR2 - Design Assistant - PHY Overview | N/A | N/A |
| 34790 | MIG Virtex-6 and 7 Series DDR2/DDR3 - User Interface | N/A | N/A |
| 34319 | MIG 7 Series and Virtex-6 DDR2/DDR3 - Usage of Example Design | N/A | N/A |