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AR# 51779

Zynq-7000 SoC - Example Designs and Tech Tips

Description

This answer record keeps track of all current Example Designs and Tech Tips available for Zynq-7000 SoC.

An Example Design is an answer record that provides technical tips to test a specific functionality on Zynq-7000 devices. A tip can be a snippet of code, a snapshot, a diagram, or a full design implemented with a specific version of the Xilinx tools. It is up to the user to "update" to future Xilinx tool releases and to "modify" the Example Design to fulfill the user's needs. Limited support is provided by Xilinx on these Example Designs.

Note: This answer record is part of Xilinx Zynq-7000 SoC Solution Center (Xilinx Answer 52512). Xilinx Zynq-7000 SoC Solution Center is available to address all questions related to Zynq-7000 SoC. Whether you are starting a new design with Zynq-7000 SoC or troubleshooting a problem, use the Zynq-7000 SoC Solution Center to guide you to the right information.

Solution

Top Answer Records on AXI Infrastructures

(Xilinx Answer 47406) Zynq-7000 Example Design - CPU throughput to access an AXI Slave using Master AXI GP
(Xilinx Answer 47266) Zynq-7000 Example Design - CPU latency to access an AXI Slave using Master AXI GP
(Xilinx Answer 50826) Zynq-7000 Example Design - Cache coherent CDMA transfers from block RAM to OCM

Top Answer Records on PS Peripherals and PL Peripherals

(Xilinx Answer 51786) Zynq-7000 Example Design - Flashes MIO GPIO LEDs, EMIO GPIO LEDs and AXI GPIO LEDs on the ZC702.
(Xilinx Answer 46880) Zynq-7000 Example Design - Linear QSPI Performance (Max Effective Throughput)
(Xilinx Answer 50572) Zynq-7000 Example Design - Interrupt handling of PL generated interrupt
(Xilinx Answer 54171) Zynq-7000 Example Design: Execute-in-place (XIP) on QSPI flash.

Top Answer Records on Networking

(Xilinx Answer 51616) Zynq-7000 Example Design - GMII Ethernet through EMIOs

Top Answer Records on Processor

(Xilinx Answer 50869) Zynq-7000 Example Design - Use of MicroBlaze processor to output "Hello World" using the PS UART

Top Answer Records on Boot and Configuration

(Xilinx Answer 46913) Zynq-7000 Example Design - Program the PL using the Linux driver for DEVCFG

Top Tech Tips


Related Documentation
Zynq-7000 SoC Technical Reference Manual
Zynq-7000 SoC Concepts, Tools and Techniques Guide
Zynq-7000 SoC Software Developers Guide

Useful Links

For technical information and collaborations with the community on Open Source projects that are being done in Xilinx, please go to: http://wiki.xilinx.com/.
For out-of-box embedded processing platforms, please go to: http://www.xilinx.com/products/boards_kits/zynq-7000.htm.

AR# 51779
Date 06/21/2018
Status Active
Type Solution Center
Devices
  • Zynq-7000
Tools
  • EDK
  • PlanAhead
Boards & Kits
  • Zynq-7000 SoC Boards and Kits
Page Bookmarked