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AR# 51807

14.2 XMD, Zynq-7000 - Why does the XMD flow hang when I run an application that uses the PL AXI ports?


The following flow hangs when I run an application that uses a PL peripheral via any AXI port (for example, trying to access the PL @ 0x40000000 via M_AXI_GPx port):

connect arm hw
source ps7_init.tcl
mrd 0x40000000 1


Starting from ISE Design Suite 14.2, the ps7_init.tcl does NOT enable the level shifters. Also, in 2.0 silicon, the boot ROM does not bring the PL out of reset anymore.

It is up to the FSBL, or the user in case of the XMD flow, to enable the level shifter and to bring the PL out of reset after the bitstream is downloaded.


The command called "init_user" takes care of the following steps:

Program PS_LVL_SHFTR_EN to 0x0000000F
Program FPGA_RESET_REG to 0x0

This is the new XMD flow starting in 14.2:

fpga -f system.bit
connect arm hw
source ps7_init.tcl


The following lines of code are used in the FSBL after the download of the bitstream (for both 1.0 and 2.0 silicon):

FsblOut32(PS_LVL_SHFTR_EN, 0x0000000F)
/* Enable AXI interface */
FsblOut32(FPGA_RESET_REG, 0);

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
52540 Zynq-7000 AP SoC - Frequently Asked Questions N/A N/A
50863 Zynq-7000 AP SoC - Debug N/A N/A
AR# 51807
Date Created 10/25/2012
Last Updated 04/19/2013
Status Active
Type General Article
  • Zynq-7000
  • EDK - 14.2