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AR# 51907

Zynq-7000 AP SoC, Boot IOP - SDIO Boot mode runs at low frequency and 1-bit data width

Description

The SD I/O interface data width and operating frequency in boot mode are programmed by the BootROM and operates at 400 KHz or less with a data width of 1 bit.

Solution

Impact:
Minor.
Work-around:
None.
Configurations Affected:
Systems that use the SDIO boot mode.
Device Revision(s) Affected: Refer to Zynq-7000 Device Advisory Master Answer Record

The user can change the operating frequency and data with using the FSBL (runs after the BootROM hands off control to the user).

Summary of operating parameters:

Parameter
7z020 CES
7z045 CES
Planned for Production
Register Bit Field
slcr.SDIO_CLK_CTRL[DIVISOR]
0x1E
0x20
sdio0.Host_control_Power_control_Block_Gap_Control_Wakeup_control
[Data_Transfer_Width_SD1_or_SD4]
0
1
sdio0.Clock_Control_Timeout_control_Software_reset [SDCLK_Frequency_Select]
0x40
0x01
SD I/O
SD I/O Clock Frequency (PS_CLK = 30 to 60 MHz)
~ 400 KHz
~ 12 to 24 MHz
SD I/O Data Width
1 bit
4 bits
AR# 51907
Date Created 10/25/2012
Last Updated 01/25/2013
Status Active
Type Design Advisory
Devices
  • Zynq-7000