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AR# 51996

Zynq-7000, DDRC - What are the Zynq Processing System DDR data sheet parameters?

Description

What are the Zynq Processing System DDR data sheet parameters? I would like to perform Hyperlynx simulation and board-level timing budget.

Solution

The Zynq Processing System DDR controller board timing parameters are provided in DS191 and DS187.

The Zynq Processing System DDR board-level design should follow the restrictions from the Zynq-7000 All Programmable SoC PCB Design and Pin Planning Guide (UG933).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
52540 Zynq-7000 AP SoC - Frequently Asked Questions N/A N/A
52539 Zynq-7000 AP SoC - Board Design N/A N/A
53051 Zynq-7000 AP SoC - PS DDR Controller N/A N/A
AR# 51996
Date Created 10/01/2012
Last Updated 11/13/2013
Status Active
Type General Article
Devices
  • Zynq-7000