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AR# 52095 Zynq-7000 Debug - Setup the TRACE port via EMIO and PJTAG via MIO PMOD on the ZED board

Description

This example design shows how to connect the TRACE port on a Zynq-7000 device via EMIO to the mictor on the XILINX HW-FMC-105-DEBUG board attached to the FMC connector of the ZED board.

It also routes the PJTAG to the MIO PMOD on the ZED board. In this way, it is possible to debug the PL (using XILINX tools) and the PS (using third-party tools) independently, using the AVNET PMOD-7ZJTAG adapter.

Solution

In the design:

  • In the Zynq TAB, PJTAG is routed to MIO 10 .. 13.
  • FCLK_CLK0 is used to feed the EMIO port EMIOTRACECLK and a divided by two version of FCLK_CLK0 is used to feed the external port TRACECLK_pin. This is because ARM defines two separate clocks, TRACECLKIN and TRACECLK, where TRACECLK = TRACECLKIN/2. TRACECLKIN is the input clock to the CoreSight components, and TRACECLK is the output clock that goes to the Lauterbach debugger. On EMIO, the EMIOTRACECLK port is actually TRACECLKIN. You will need to generate your own divide-by-2 version of this clock in the PL, and output it to the TRACECLK_pin.
  • The ucf constrains for the TRACE port needs to match the ZED board layout

Step-by-step instructions:

  1. Connect the XILINX HW-FMC-105-DEBUG board to the FMC connector on the ZED board
  2. Connectyour TRACErto the mictor connector on theXILINX HW-FMC-105-DEBUG board
  3. Connect the AVNET PMOD-7ZJTAGadapter to the MIO PMOD connector on the ZED board
  4. Connect your 20-pin DEBUG header to the 20-pin connector on the AVNET PMOD-7ZJTAG adapter
  5. Setup the boot mode jumpers to boot from SD card in Independent JTAG mode.
  6. Create a BOOT.bin ( to copy on your SD card ) that contains:
    • the FSBLcreatedfrom the attached SDK project
    • the bitstream createdfrom the attached XPS project
    • the "Hello World" example created from the SDK project
  7. Boot from SD card and wait until the DONE LEDlights up and"Hello World"prints on theterminal ( 115200, 8, 1, N, N )


Expected result:

  • Using the Platform USB cable, the user can debug the PL with XILINX tools (e.g., ChipScope)
  • Using a third-party 20-pin header, the user can debug the PS accessing the cortex-A9 CPUs
  • Using a TRACEr, the user can profile the software application

Go tohttp://www.zedboard.orgfor more information about the ZED board and the PMOD-7ZJTAG adapter.

Attachments

Associated Attachments

Name File Size File Type
BOOT.zip 36 KB ZIP
zed_system_archive.zip 15 KB ZIP
sdk_zed.zip 889 KB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
50863 Zynq-7000 AP SoC - Debug N/A N/A

Actions

AR# 52095
Date Created 11/20/2012
Last Updated 03/02/2013
Status Active
Type General Article
Devices
  • Zynq-7000
Tools
  • EDK - 14.3
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