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AR# 52230 MIG 7 Series RLDRAM II - Traffic Generator in the example design gets stuck after sending write commands


Version Found: v1.7
Version Resolved and other Known Issues: See (Xilinx Answer 45195).

The MIG 7 Series RLDRAM II Traffic Generator in the example design gets stuck after generating a long series of write commands. When the command FIFO becomes full the Traffic Generator incorrectly continues to send data until the data FIFO also becomes full and the traffic generator then becomes stuck.


To work around this issue, use the "user_wdfifo_full" signal instead of the delayed version "user_wdfifo_r" in example_top.v.

To implement the work around, open example_top.v and change Line 715 to:
.memc_wr_full (user_wdfifo_afull_r),

Revision History
10/16/2012 - Initial release
AR# 52230
Date Created 10/05/2012
Last Updated 10/11/2012
Status Active
Type
Devices
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series
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