Version Found: MIG 7 Series v1.7.a
Version Resolved: See
(Xilinx Answer 45195)MIG 7 Series fails in Vivado GUI mode when the MIG design signals are enabled. This is a result of the ChipScope cores being inferred as black boxes, and the following error message can be seen:
ERROR: [Opt 31-30] Blackbox CHIPSCOPE_INST.u_cs1 (vio_ain256_aout64_sout64) is driving pin I2 of primitive cell u_my_mig/u_mig_7series_v1_7_rld_memc_ui_top_std_i_2. This blackbox cannot be found in the existing library.
This includes MIG example designs created by using the "Open IP Example Design" option in the Vivado GUI.