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AR# 52337

Zynq-7000 AP SoC - Do the MIO pins provide termination?

Description

Do the MIO pins provide input termination or does it need to be provided externally?

The DDR pins of the MIO interface mirror PL HP banks with DCI termination via the VRP/VRN pins, but what about the PS MIO pins?

Solution

The general MIO pins mirror HR bank pins, but lack the uncalibrated input termination that the PL version of those pins have.
AR# 52337
Date Created 10/09/2012
Last Updated 01/19/2015
Status Active
Type General Article
Devices
  • Zynq-7000
  • XA Zynq-7000
  • Zynq-7000Q