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AR# 52655

Kintex-7 Connectivity Kit, Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform

Description

The 7 Series Integrated Block for PCI Express core does not link up successfully on an Intel Z77 (Ivy Bridge) platform. This affects the out-of-box experience for customers wishing to use the Kintex-7 Connectivity TRD (pre v1.4 of the TRD).

Solution

This is a known issue for the core implemented in Artix and Kintex devices due to an Intel errata. To work around this issue, please refer to (Xilinx Answer 51135).

An out-of-the-box solution is available to enable customers to run the Kintex-7 Connectivity TRD. This involves using a particular set of files (bit and MCS file) when running the Connectivity TRD. The files needed, k7_conn_trd.bit and kc705_conn_trd.mcs, can be found below.

For information on how to run the Connectivity TRD, please refer to the Kintex-7 FPGA Connectivity Targeted Reference Design User Guide (UG927):
http://www.xilinx.com/support/documentation/boards_and_kits/ug927-K7-Connectivity-TRD.pdf

This solution is no longer required for Connectivity TRD (v1.4); the PCIe IP has been updated, so this patch no longer applies.

Attachments

Associated Attachments

Name File Size File Type
k7_conn_trd.bit 8 MB BIT
kc705_conn_trd.mcs 23 MB MCS

Linked Answer Records

Master Answer Records

AR# 52655
Date Created 10/31/2012
Last Updated 05/13/2013
Status Active
Type General Article
Boards & Kits
  • Kintex-7 FPGA Connectivity Kit