We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 53092

2013.4 Vivado - How do I instruct the Vivado tools to place registers into IOBs?


How do I instruct the Vivado tools to place registers into IOBs?

There used to be a -pr switch in MAP of ISE to control this, but I cannot find anything on it in the Vivado tool.


Both ISE and Vivado tools support the IOB property to direct a FF to be placed in IOB (actually ILOGIC or OLOGIC) site.

In ISE, the Map application also supported the -pr (pack registers) switch, but it did not take precedence over IOB properties, so it only had an effect on FFs that had no IOB property assigned. Vivado has no option comparable to the -pr switch, so it is necessary to use IOB properties to control IOB register usage.

You can use IOB constraint on registers:

set_property IOB true [get_cells <registers_name_pattern>]

Beginning in 2013.1, you can use IOB contraint on ports:

set_property IOB true [get_ports <ports_name_pattern>]

For the IOB register pack to be successful, the following conditions need to be met:

  • For output register, there must be no loads other than the OBUF instance since there is no path from the register back to the FPGA fabric.
  • There must be no constraints on the FF that conflict with the IOB usage (i.e., PBLOCK or LOC).
AR# 53092
Date Created 11/23/2012
Last Updated 02/04/2014
Status Active
Type General Article
  • Kintex UltraScale
  • Kintex-7Q
  • Artix-7
  • Artix-7Q
  • Vivado Design Suite - 2013.4